Two days ago IBM and their consortium partners made a big splash by announcing that they had successfully manufactured prototype chips on the wafer scale (not just individual devices) with features compatible with the 7 nm "node". What does that mean? It's being reported that the transistors themselves are "7 nm wide". Is that correct?
The term "node" is used by the semiconductor industry to characterize major targets in their manufacturing roadmap. See here for more information that you could ever possibly want about this. The phrase "xx nm node" means that the smallest spacing between repeated features on a chip along one direction is xx nm. It does not actually mean that transistors are now xx nm by xx nm. Right now, the absolute state of the art on the market from Intel are chips at the 14 nm node. A cross-section of those taken by transmission electron microscope is shown to the right (image from TechInsights), and Intel has a nice video explaining the scheme here. The transistors involve fin-shaped pieces of silicon - each fin is about 14 nm wide, 60-70 nm tall, and a hundred or more nm long. One transistor unit in this design contains two fins each about 40 nm apart, as you can see in the image. The gate electrode that cuts across the fins is actually about 40-50 nm in width. I know this is tough to visualize - here is a 3-fin version, annotated from a still from Intel's video. In these devices current flows along the long direction of the fin, and the gate can either let the current pass or not, depending on the voltage applied - that's how these things function as switches.
So: The 7 nm node IBM chip is very impressive. However, don't buy into the press release wholesale just yet - there is a lot of ground to cover before it becomes clear that these chips are really "manufacturable" in the sense commonly used by the semiconductor industry.
I'll touch on two points here. First, yield. The standard architecture of high performance logic chips these days assumes that all the transistors work, and we are talking about chips that would contain several billion transistors each. In terms of manufacturing and reliability, integrated semiconductor devices are freaking amazing and put mechanical devices to shame - billions of components connected in a complicated way, and barring disaster these things can all work for many years at a time without failure. To be "manufacturable", chip makers need to have the yield of good chips (chips where all the components actually work) be high enough to cover the manufacturing costs at a reasonable price point. That typically means yield rates over at least 30%. Back in the '90s Intel was giving its employees keychains made from dead Pentium processors. It's not at all clear that IBM can really make these chips with good yields. Note that Intel recently delayed manufacturing of 10 nm node chips because of problems.
Second, patterning technology. All chips in recent years (including Intel's 14 nm and even their prototype 10 nm node products) are patterned using photolithography, based on a light source with a wavelength of 193 nm (!). Manufacturers have relied on several bits of extreme cleverness to pattern features down to 1/20 of the free-space wavelength of the light, including immersion lithography, optical phase control, exotic photochemistry, and multiple patterning. However, those can only carry you so far. IBM and their partners have decided that now is finally the time to switch to a new light source, 13.5 nm wavelength, the so-called extreme ultraviolet. This has been in the planning stages for years, with prototype EUV 300 mm wafer systems at Albany Nanofab and IMEC for about a decade. However, changing to new wavelengths and therefore new processing chemistry and procedures is fraught with challenges. I'm sure that IBM will get there, as will their competitors eventually, but it wouldn't shock me if we don't see actual manufacturing of 7 nm node chips for four or five more years at least.